SI7111EDN-T1-GE3

Vishay Intertechnology, Inc.

SI7111EDN-T1-GE3

Availability

Design risk

Price trend

Lead time

Semiconductors

Small Signal Field-Effect Transistors

Lead time 6 weeks
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Availability

Design risk

Price trend

Lead time

Semiconductors

Small Signal Field-Effect Transistors

Lead time 6 weeks

Trans MOSFET P-CH 30V 60A 8-Pin PowerPAK 1212 EP T/R

Technical Data
Application SWITCHING
JESD-30 Code S-PDSO-F5
Configuration SINGLE WITH BUILT-IN DIODE
Package Shape SQUARE
Package Style (Meter) SMALL OUTLINE
Surface Mount YES
Terminal Form FLAT
FET Technology METAL-OXIDE SEMICONDUCTOR
J-STD-609 Code e3
Operating Mode ENHANCEMENT MODE
Case Connection DRAIN
Terminal Finish Matte Tin (Sn)
Terminal Position DUAL
Number of Elements 1
Number of Terminals 5
Package Body Material PLASTIC/EPOXY
Polarity/Channel Type P-CHANNEL
Power Dissipation-Max (W) 52
Drain Current-Max (ID) (A) 49.3
Moisture Sensitivity Level 1
Transistor Element Material SILICON
Turn-on Time-Max (ton) (ns) 130
DS Breakdown Voltage-Min (V) 30
Feedback Cap-Max (Crss) (pF) 395
Peak Reflow Temperature (Cel) 260
Turn-off Time-Max (toff) (ns) 306
Operating Temperature-Max (Cel) 150
Operating Temperature-Min (Cel) -55
Avalanche Energy Rating (Eas) (mJ) 20
Pulsed Drain Current-Max (IDM) (A) 150
Drain-source On Resistance-Max (ohm) 0.00855
Time@Peak Reflow Temperature-Max (s) 30

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Sourceability North America, LLC

9715 Burnet Rd, Ste 200
Austin, TX 78758-5215