SI7110DN-T1-GE3

Vishay Intertechnology, Inc.

SI7110DN-T1-GE3

Availability

Design risk

Price trend

Lead time

Semiconductors

Small Signal Field-Effect Transistors

Lead time 6 weeks
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Availability

Design risk

Price trend

Lead time

Semiconductors

Small Signal Field-Effect Transistors

Lead time 6 weeks

MOSFET N-CH 20V 13.5A PPAK1212-8

Technical Data
Application SWITCHING
JESD-30 Code S-XDSO-C5
Configuration SINGLE WITH BUILT-IN DIODE
Package Shape SQUARE
Package Style (Meter) SMALL OUTLINE
Surface Mount YES
Terminal Form C BEND
FET Technology METAL-OXIDE SEMICONDUCTOR
J-STD-609 Code e3
Operating Mode ENHANCEMENT MODE
Case Connection DRAIN
Terminal Finish Matte Tin (Sn)
DLA Qualification Not Qualified
Terminal Position DUAL
Number of Elements 1
Number of Terminals 5
Package Body Material UNSPECIFIED
Polarity/Channel Type N-CHANNEL
Power Dissipation-Max (W) 3.8
Drain Current-Max (ID) (A) 13.5
Moisture Sensitivity Level 1
Transistor Element Material SILICON
DS Breakdown Voltage-Min (V) 20
Peak Reflow Temperature (Cel) 260
Operating Temperature-Max (Cel) 150
Avalanche Energy Rating (Eas) (mJ) 61
Pulsed Drain Current-Max (IDM) (A) 60
Drain-source On Resistance-Max (ohm) 0.0053
Time@Peak Reflow Temperature-Max (s) 30

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Sourceability North America, LLC

9715 Burnet Rd, Ste 200
Austin, TX 78758-5215