XC2C128-7VQG100I
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CPLD - Complex Programmable Logic Devices XC2C128-7VQG100I
Width (mm) | 14 |
Length (mm) | 14 |
JTAG BST | YES |
Technology | CMOS |
Architecture | PLA-TYPE |
JESD-30 Code | S-PQFP-G100 |
Organization | 0 DEDICATED INPUTS, 80 I/O |
Package Code | TFQFP |
JESD-609 Code | e3 |
Package Shape | SQUARE |
Package Style (Meter) | FLATPACK, THIN PROFILE, FINE PITCH |
Surface Mount | YES |
Terminal Form | GULL WING |
Terminal Pitch (mm) | 0.5 |
Output Function | MACROCELL |
Terminal Finish | MATTE TIN |
Number of Inputs | 80 |
Number of Outputs | 80 |
Propagation Delay (ns) | 7.5 |
Seated Height-Max (mm) | 1.2 |
Temperature Grade | INDUSTRIAL |
Terminal Position | QUAD |
Additional Feature | YES |
Supply Voltage-Max (V) | 1.9 |
Supply Voltage-Min (V) | 1.7 |
Supply Voltage-Nom (V) | 1.8 |
Clock Frequency-Max (MHz) | 119 |
Number of I/O Lines | 80 |
Number of Terminals | 100 |
Qualification Status | Not Qualified |
Number of Macro Cells | 128 |
Package Body Material | PLASTIC/EPOXY |
In-System Programmable | YES |
Programmable Logic Type | FLASH PLD |
Package Equivalence Code | TQFP100,.63SQ |
Operating Temperature-Max (Cel) | 85 |
Operating Temperature-Min (Cel) | -40 |
Moisture Sensitivity Level | 3 |
Number of Dedicated Inputs | 0 |
Peak Reflow Temperature (Cel) | 260 |
Time@Peak Reflow Temperature-Max (s) | 30 |
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Sourceability North America, LLC
9715 Burnet Rd, Ste 200