EPM1270F256I5N
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CPLD MAX® II Family 980 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 256-Pin FBGA Tray
| Width (mm) | 17 |
| Length (mm) | 17 |
| JTAG BST | YES |
| Technology | CMOS |
| JESD-30 Code | S-PBGA-B256 |
| Organization | 0 DEDICATED INPUTS, 212 I/O |
| Package Code | BGA |
| JESD-609 Code | e1 |
| Package Shape | SQUARE |
| Package Style (Meter) | GRID ARRAY |
| Surface Mount | YES |
| Terminal Form | BALL |
| Terminal Pitch (mm) | 1 |
| Output Function | MACROCELL |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Propagation Delay (ns) | 10 |
| Seated Height-Max (mm) | 2.2 |
| Terminal Position | BOTTOM |
| Additional Feature | IT CAN ALSO OPERATE AT 3.3V |
| Supply Voltage-Max (V) | 2.625 |
| Supply Voltage-Min (V) | 2.375 |
| Supply Voltage-Nom (V) | 2.5 |
| Number of I/O Lines | 212 |
| Number of Terminals | 256 |
| Qualification Status | Not Qualified |
| Number of Macro Cells | 980 |
| Package Body Material | PLASTIC/EPOXY |
| In-System Programmable | YES |
| Programmable Logic Type | FLASH PLD |
| Package Equivalence Code | BGA256,16X16,40 |
| Moisture Sensitivity Level | 3 |
| Number of Dedicated Inputs | 0 |
| Peak Reflow Temperature (Cel) | 260 |
| Time@Peak Reflow Temperature-Max (s) | 30 |
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Sourceability North America, LLC
9715 Burnet Rd, Ste 200