M4A5-32/32-10VNC48

Lattice Semiconductor

M4A5-32/32-10VNC48

Availability

Design risk

Price trend

Lead time

Semiconductors

Programmable Logic Devices

Lead time 6 weeks
4 results found

Availability

Design risk

Price trend

Lead time

Semiconductors

Programmable Logic Devices

Lead time 6 weeks

CPLD ispMACH 4A Family 1.25K Gates 32 Macro Cells

Technical Data
JTAG BST YES
Technology CMOS
Width (mm) 7
Length (mm) 7
Architecture PAL-TYPE
JESD-30 Code S-PQFP-G48
Organization 0 DEDICATED INPUTS, 32 I/O
Package Code LFQFP
Package Shape SQUARE
Package Style (Meter) FLATPACK, LOW PROFILE, FINE PITCH
Surface Mount YES
Terminal Form GULL WING
J-STD-609 Code e3
Output Function MACROCELL
Terminal Finish MATTE TIN
Number of Inputs 34
DLA Qualification Not Qualified
Number of Outputs 32
Temperature Grade COMMERCIAL
Terminal Position QUAD
Additional Feature YES
Number of I/O Lines 32
Number of Terminals 48
Terminal Pitch (mm) 0.5
Number of Macro Cells 32
Package Body Material PLASTIC/EPOXY
In-System Programmable YES
Propagation Delay (ns) 10
Seated Height-Max (mm) 1.6
Supply Voltage-Max (V) 5.25
Supply Voltage-Min (V) 4.75
Supply Voltage-Nom (V) 5
Programmable Logic Type EE PLD
Package Equivalence Code QFP48,.35SQ,20
Clock Frequency-Max (MHz) 62.5
Moisture Sensitivity Level 3
Number of Dedicated Inputs 0
Peak Reflow Temperature (Cel) 260
Operating Temperature-Max (Cel) 70
Operating Temperature-Min (Cel) 0
Time@Peak Reflow Temperature-Max (s) 40

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