XC2S200-5PQG208C

Xilinx,Inc.

XC2S200-5PQG208C

Availability

Design risk

Price trend

Lead time

Semiconductors

Field Programmable Gate Arrays

Lead time 6 weeks
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Availability

Design risk

Price trend

Lead time

Semiconductors

Field Programmable Gate Arrays

Lead time 6 weeks

FPGA - Field Programmable Gate Array 200000 SYSTEM GATE 2.5 VOLT LOGIC CELL A

Technical Data
Width (mm) 28
Length (mm) 28
JESD-30 Code S-PQFP-G208
Organization 1176 CLBS, 200000 GATES
Package Code FQFP
Package Shape SQUARE
Package Style (Meter) FLATPACK, FINE PITCH
Surface Mount YES
Terminal Form GULL WING
J-STD-609 Code e3
Number of CLBs 1176
Terminal Finish Matte Tin (Sn)
Number of Inputs 144
DLA Qualification Not Qualified
Number of Outputs 140
Temperature Grade OTHER
Terminal Position QUAD
Number of Terminals 208
Terminal Pitch (mm) 0.5
Number of Logic Cells 5292
Package Body Material PLASTIC/EPOXY
Seated Height-Max (mm) 4.1
Supply Voltage-Max (V) 2.625
Supply Voltage-Min (V) 2.375
Supply Voltage-Nom (V) 2.5
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Package Equivalence Code QFP208,1.2SQ,20
Clock Frequency-Max (MHz) 263
Moisture Sensitivity Level 3
Number of Equivalent Gates 200000
Peak Reflow Temperature (Cel) 245
Operating Temperature-Max (Cel) 85
Operating Temperature-Min (Cel) 0
Time@Peak Reflow Temperature-Max (s) 30
Combinatorial Delay of a CLB-Max (ns) 0.7

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