CY7C68013A-128AXC
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Interfaces ICs, CY7C68013A-128AXC, Cypress The CY7C68013A is identical to CY7C68014A in form, fit, and functionality. Two additional GPIO signals are available to provide more flexibility when neither IFCLK or CLKOUT are needed, the two GPIOs give developers the signals they need for the power-control circuitry of their bus-powered application without pushing them to a high-pincount version of FX2LP. Features USB 2.0 USB IF Hi-Speed certified Ultra-low power: ICC no more than 85 mA in any mode Four programmable BULK, INTERRUPT, and ISOCHRONOUS endpoints Smart media standard ECC generation 8-bit or 16-bit external data interface
| Bit Size | 8 |
| CPU Family | 8051 |
| Technology | CMOS |
| Width (mm) | 14 |
| Length (mm) | 20 |
| Speed (MHz) | 48 |
| ADC Channels | NO |
| DAC Channels | NO |
| DMA Channels | NO |
| JESD-30 Code | R-PQFP-G128 |
| PWM Channels | NO |
| Package Code | LFQFP |
| Package Shape | RECTANGULAR |
| Package Style (Meter) | FLATPACK, LOW PROFILE, FINE PITCH |
| Surface Mount | YES |
| Terminal Form | GULL WING |
| J-STD-609 Code | e3 |
| Terminal Finish | Matte Tin (Sn) |
| Address Bus Width | 16 |
| Bus Compatibility | I2C; UART; USB |
| DLA Qualification | Not Qualified |
| Temperature Grade | COMMERCIAL |
| Terminal Position | QUAD |
| Number of I/O Lines | 40 |
| Number of Terminals | 128 |
| Program Memory Type | EEPROM |
| Terminal Pitch (mm) | 0.5 |
| Data RAM Size (bytes) | 16384 |
| Package Body Material | PLASTIC/EPOXY |
| Seated Height-Max (mm) | 1.6 |
| Supply Voltage-Max (V) | 3.6 |
| Supply Voltage-Min (V) | 3 |
| Supply Voltage-Nom (V) | 3.3 |
| External Data Bus Width | 8 |
| Supply Current-Max (mA) | 85 |
| Package Equivalence Code | QFP128,.63X.87,20 |
| Clock Frequency-Max (MHz) | 24 |
| Moisture Sensitivity Level | 3 |
| uPs/uCs/Peripheral ICs Type | BUS CONTROLLER, UNIVERSAL SERIAL BUS |
| Data Transfer Rate-Max (MBps) | 60 |
| Peak Reflow Temperature (Cel) | 260 |
| Operating Temperature-Max (Cel) | 70 |
| Operating Temperature-Min (Cel) | 0 |
| Time@Peak Reflow Temperature-Max (s) | 20 |
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CONTACT REASON
Sourceability North America, LLC
9715 Burnet Rd, Ste 200You can download the user manual and technical specifications for Cypress Semiconductor Corporation CY7C68013A-128AXC in the documentation section.
Interfaces ICs, CY7C68013A-128AXC, Cypress The CY7C68013A is identical to CY7C68014A in form, fit, and functionality. Two additional GPIO signals are available to provide more flexibility when neither IFCLK or CLKOUT are needed, the two GPIOs give developers the signals they need for the power-control circuitry of their bus-powered application without pushing them to a high-pincount version of FX2LP. Features USB 2.0 USB IF Hi-Speed certified Ultra-low power: ICC no more than 85 mA in any mode Four programmable BULK, INTERRUPT, and ISOCHRONOUS endpoints Smart media standard ECC generation 8-bit or 16-bit external data interface
As part of the category Semiconductors and subcategory Semiconductors, CY7C68013A-128AXC optimizes energy distribution in electronic devices. Its Interfaces ICs, CY7C68013A-128AXC, Cypress The CY7C68013A is identical to CY7C68014A in form, fit, and functionality. Two additional GPIO signals are available to provide more flexibility when neither IFCLK or CLKOUT are needed, the two GPIOs give developers the signals they need for the power-control circuitry of their bus-powered application without pushing them to a high-pincount version of FX2LP. Features USB 2.0 USB IF Hi-Speed certified Ultra-low power: ICC no more than 85 mA in any mode Four programmable BULK, INTERRUPT, and ISOCHRONOUS endpoints Smart media standard ECC generation 8-bit or 16-bit external data interface allows minimizing losses and increasing the overall system efficiency.
As a component of the subcategory Semiconductors, CY7C68013A-128AXC ensures stable output voltage even when the load changes. Its Interfaces ICs, CY7C68013A-128AXC, Cypress The CY7C68013A is identical to CY7C68014A in form, fit, and functionality. Two additional GPIO signals are available to provide more flexibility when neither IFCLK or CLKOUT are needed, the two GPIOs give developers the signals they need for the power-control circuitry of their bus-powered application without pushing them to a high-pincount version of FX2LP. Features USB 2.0 USB IF Hi-Speed certified Ultra-low power: ICC no more than 85 mA in any mode Four programmable BULK, INTERRUPT, and ISOCHRONOUS endpoints Smart media standard ECC generation 8-bit or 16-bit external data interface makes it a reliable element in multi-level power systems.
