5M160ZT100I5N
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CPLD - Complex Programmable Logic Devices
| JTAG BST | YES |
| Technology | CMOS |
| Width (mm) | 14 |
| Length (mm) | 14 |
| JESD-30 Code | S-PQFP-G100 |
| Organization | 79 I/O |
| Package Code | TFQFP |
| Package Shape | SQUARE |
| Package Style (Meter) | FLATPACK, THIN PROFILE, FINE PITCH |
| Surface Mount | YES |
| Terminal Form | GULL WING |
| J-STD-609 Code | e2 |
| Output Function | MACROCELL |
| Terminal Finish | MATTE TIN COPPER |
| DLA Qualification | Not Qualified |
| Temperature Grade | INDUSTRIAL |
| Terminal Position | QUAD |
| Additional Feature | YES |
| Number of I/O Lines | 79 |
| Number of Terminals | 100 |
| Terminal Pitch (mm) | 0.5 |
| Number of Macro Cells | 128 |
| Package Body Material | PLASTIC/EPOXY |
| In-System Programmable | YES |
| Propagation Delay (ns) | 14 |
| Seated Height-Max (mm) | 1.2 |
| Supply Voltage-Max (V) | 1.89 |
| Supply Voltage-Min (V) | 1.71 |
| Supply Voltage-Nom (V) | 1.8 |
| Programmable Logic Type | FLASH PLD |
| Package Equivalence Code | TQFP100,.63SQ |
| Clock Frequency-Max (MHz) | 118.3 |
| Peak Reflow Temperature (Cel) | 260 |
| Operating Temperature-Max (Cel) | 100 |
| Operating Temperature-Min (Cel) | -40 |
| Time@Peak Reflow Temperature-Max (s) | 40 |
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CONTACT REASON
Sourceability North America, LLC
9715 Burnet Rd, Ste 200You can download the user manual and technical specifications for ALTERA CORP 5M160ZT100I5N in the documentation section.
CPLD - Complex Programmable Logic Devices
As part of the category Semiconductors and subcategory Semiconductors, 5M160ZT100I5N optimizes energy distribution in electronic devices. Its CPLD - Complex Programmable Logic Devices allows minimizing losses and increasing the overall system efficiency.
As a component of the subcategory Semiconductors, 5M160ZT100I5N ensures stable output voltage even when the load changes. Its CPLD - Complex Programmable Logic Devices makes it a reliable element in multi-level power systems.
