XIO2001ZWS
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PCI Express® (PCIe®) to PCI bus translation bridge 169-NFBGA 0 to 70
| Technology | CMOS |
| Width (mm) | 12 |
| Length (mm) | 12 |
| JESD-30 Code | S-PBGA-B169 |
| Package Code | LFBGA |
| Package Shape | SQUARE |
| Package Style (Meter) | GRID ARRAY, LOW PROFILE, FINE PITCH |
| Surface Mount | YES |
| Terminal Form | BALL |
| J-STD-609 Code | e1 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Address Bus Width | 32 |
| Bus Compatibility | PCI |
| Temperature Grade | COMMERCIAL |
| Terminal Position | BOTTOM |
| Number of Terminals | 169 |
| Terminal Pitch (mm) | 0.8 |
| Package Body Material | PLASTIC/EPOXY |
| Seated Height-Max (mm) | 1.4 |
| Supply Voltage-Max (V) | 1.65 |
| Supply Voltage-Min (V) | 1.35 |
| Supply Voltage-Nom (V) | 1.5 |
| External Data Bus Width | 32 |
| Package Equivalence Code | BGA169,13X13,32 |
| Clock Frequency-Max (MHz) | 125 |
| Moisture Sensitivity Level | 3 |
| uPs/uCs/Peripheral ICs Type | BUS CONTROLLER, PCI |
| Data Transfer Rate-Max (MBps) | 250 |
| Peak Reflow Temperature (Cel) | 260 |
| Operating Temperature-Max (Cel) | 70 |
| Operating Temperature-Min (Cel) | 0 |
| Time@Peak Reflow Temperature-Max (s) | 30 |
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CONTACT REASON
Sourceability North America, LLC
9715 Burnet Rd, Ste 200You can download the user manual and technical specifications for Texas Instruments Incorporated XIO2001ZWS in the documentation section.
PCI Express® (PCIe®) to PCI bus translation bridge 169-NFBGA 0 to 70
As part of the category Semiconductors and subcategory Semiconductors, XIO2001ZWS optimizes energy distribution in electronic devices. Its PCI Express® (PCIe®) to PCI bus translation bridge 169-NFBGA 0 to 70 allows minimizing losses and increasing the overall system efficiency.
As a component of the subcategory Semiconductors, XIO2001ZWS ensures stable output voltage even when the load changes. Its PCI Express® (PCIe®) to PCI bus translation bridge 169-NFBGA 0 to 70 makes it a reliable element in multi-level power systems.
