CY7C1061GE30-10BV1XI
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SRAM Chip Async Single 2.5V/3.3V 16M-bit 1M x 16 10ns 48-Pin VFBGA Tray
Technology | CMOS |
Width (mm) | 6.0000 |
Length (mm) | 8.0000 |
JESD-30 Code | R-PBGA-B48 |
Memory Width | 16 |
Package Code | VFBGA |
Package Shape | RECTANGULAR |
Package Style | GRID ARRAY, VERY THIN PROFILE, FINE PITCH |
Surface Mount | YES |
Terminal Form | BALL |
J-STD-609 Code | e1 |
Memory IC Type | STANDARD SRAM |
Operating Mode | ASYNCHRONOUS |
Parallel/Serial | PARALLEL |
Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
Temperature Grade | INDUSTRIAL |
Terminal Position | BOTTOM |
Memory Organization | 1MX16 |
Number of Functions | 1 |
Number of Terminals | 48 |
Terminal Pitch (mm) | 0.750 |
Access Time-Max (ns) | 10.0000000000000000 |
Number of Words Code | 1M |
Memory Density (bits) | 16777216.0000000000000000 |
Package Body Material | PLASTIC/EPOXY |
Seated Height-Max (mm) | 1.0000 |
Supply Voltage-Max (V) | 3.60000 |
Supply Voltage-Min (V) | 2.20000 |
Supply Voltage-Nom (V) | 3 |
Number of Words (words) | 1048576.0000000000000000 |
Moisture Sensitivity Level | 3 |
Peak Reflow Temperature (Cel) | 260 |
Operating Temperature-Max (Cel) | 85.0 |
Operating Temperature-Min (Cel) | -40.0 |
Time@Peak Reflow Temperature-Max (s) | 30 |
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CONTACT REASON
Sourceability North America, LLC
9715 Burnet Rd, Ste 200You can download the user manual and technical specifications for INFINEON TECHNOLOGIES AG CY7C1061GE30-10BV1XI in the documentation section.
SRAM Chip Async Single 2.5V/3.3V 16M-bit 1M x 16 10ns 48-Pin VFBGA Tray
As part of the category Semiconductors and subcategory Semiconductors, CY7C1061GE30-10BV1XI optimizes energy distribution in electronic devices. Its SRAM Chip Async Single 2.5V/3.3V 16M-bit 1M x 16 10ns 48-Pin VFBGA Tray allows minimizing losses and increasing the overall system efficiency.
As a component of the subcategory Semiconductors, CY7C1061GE30-10BV1XI ensures stable output voltage even when the load changes. Its SRAM Chip Async Single 2.5V/3.3V 16M-bit 1M x 16 10ns 48-Pin VFBGA Tray makes it a reliable element in multi-level power systems.